Semiconductor memory devices are under developing, which include three-dimensionally disposed memory cells. For example, a NAND-type memory device has stacked word lines and a semiconductor layer extending in the stacking direction through the word lines. The memory cells are disposed at portions where the semiconductor layer crosses the word lines, and the word lines act as control gates of the memory cells respectively. It is difficult in such a semiconductor memory device to directly monitor the memory cell structure, which is provided between the semiconductor layer and the word lines, in the manufacturing process thereof.